WILSONVILLE, Ore., May 27, 2015 /PRNewswire/ -- The
Veloce® Power Application Software delivers:
- A complete solution that enables a new comprehensive
methodology for power
- Accurate and early switching activity at the application
level
- Early budgeting and tradeoff exploration at RTL
- Analysis and sign off at the gate level
- Real-time transfer of power switching activity, via a Dynamic
Read Waveform API, to power analysis tools replacing current
file-based activity transfer methodology
- Tight integration with an ecosystem of industry-recognized
power analysis tools
For a technical whitepaper visit:
http://www.mentor.com/products/fv/techpubs/download/?id=90538
Mentor Graphics Corporation (NASDAQ: MENT) today released
the Veloce® Power Application software that
enables accurate, timely and efficient power analysis at the
system, RTL and gate level for complex SoC designs.
Power continues to be a primary concern for handheld and smart
devices with high resolutions screens that require long battery
life, and even wall-plugged equipment in a datacenter or in a
network configuration needs to reduce operation costs. Using FinFET
process technology reduces static leakage, yet dynamic power
remains a challenge.
A new usage model for handheld and smart devices is driving a
methodology shift in the way power is analyzed. One primary
driver in this shift is the fact that complex SoC designs are now
verified using live applications that require booting the OS and
running software applications on an emulator. It is more effective
to use the power switching activity plot, generated during
emulation, to pass real-time switching activity information to
power analysis tools where potential power issues can be
evaluated.
"The ITRS report, one of my many primary research projects, has
emphasized the issues related to dynamic power for several years,"
said Gary Smith, founder and chief
analyst, Gary Smith EDA. "A new approach to the transfer of power
switching activity data captured during emulation is the right
direction for the industry."
When designs with significant software content are run on an
emulator, the current method of generating activity data creates
files (like FSDB) that are too large for power analysis tools to
handle practically.
The Veloce Power Application replaces the file-based power
analysis flow with a Dynamic Read Waveform API integration to power
analysis tools. This Dynamic Read Waveform API approach
captures the information from the power switching activity plot and
transfers that data to power analysis tools. This enables
accurate power calculation at the system level, better power
exploration at RTL for power budgeting and tradeoffs as well as
more accurate power analysis and sign-off at the gate level.
The result is a significant boost in runtime and performance.
The typical approach of running the emulator, creating the file,
reading the file into the power analysis tool and running the power
analysis tool is now, with this new approach, reduced to the
emulator and power analysis runtimes.
Current early access partners and customers have seen up to a
4.5X runtime performance improvement.
"Today we have redefined the power analysis flow," said
Eric Selosse, vice president and
general manager of the Mentor Emulation Division. "The Veloce
Power Application is a proof point to show that a new methodology
that captures real power consumption during emulation and
effectively passes that information to power analysis tools is more
efficient."
Delivering this integration with an ecosystem of
industry-recognized power analysis tool providers is essential to
redefining the power analysis flow. The first Veloce Power
Application ecosystem partner is ANSYS® with
PowerArtist™.
"This collaboration addresses the challenges for designers of
energy-efficient IP and SoC designs in various IoT verticals," said
Vic Kulkarni, Sr. vice president and
general manager, RTL power business, at Apache division of ANSYS.
"With our industry leading PowerArtist solution, we are delighted
to be the premier partner in the Veloce Power Application
ecosystem, and to work so closely with a technology leader in
hardware emulation."
The Veloce Power Application integration with
ANSYS PowerArtist is available to mutual customers on a
limited basis. Full production release is scheduled for early Q4/CY
2015.
About the Veloce Emulation platform
The Veloce emulation platform is a core technology in the
Mentor® Enterprise Verification Platform (EVP) – a
platform that boosts productivity in ASIC and SoC functional
verification by combining advanced verification technologies in a
comprehensive platform.
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic
hardware and software design solutions, providing products,
consulting services and award-winning support for the world's most
successful electronic, semiconductor and systems companies.
Established in 1981, the company reported revenues in the last
fiscal year in excess of $1.24
billion. Corporate headquarters are located at 8005 S.W.
Boeckman Road, Wilsonville, Oregon
97070-7777. World Wide Web site: http://www.mentor.com/.
Mentor Graphics, Mentor and Veloce are registered trademarks of
Mentor Graphics Corporation. All other company or product names are
the registered trademarks or trademarks of their respective
owners.
For more information, please contact:
Carole Dunn
Mentor Graphics
503.685.4716
carole_dunn@mentor.com
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SOURCE Mentor Graphics