Synplicity Introduces System Designer: System-Level Implementation and IP Integration Tool for FPGA Design
15 4월 2008 - 9:30PM
Business Wire
Synplicity�, Inc. (NASDAQ:SYNP), a leading supplier of innovative
IC design and verification solutions, today introduced System
Designer�, a device-independent intellectual property (IP)
configuration and system-level assembly environment that has been
added to Synplicity�s Synplify Pro� and Synplify� Premier FPGA
design implementation tools. The System Designer� capability allows
users to select, configure and assemble internal and third-party IP
delivered in the IP-XACT format, integrate that IP and then easily
implement it into a variety of FPGA vendor devices, including those
from Actel, Altera, Lattice Semiconductor and Xilinx. The new tool
flow provides FPGA designers, using IP and system-level blocks,
with an extremely productive path to implementing complex systems
in FPGAs. System Designer is a key component of Synplicity�s
ReadyIP Initiative, a program that takes aim at simplifying the
access, evaluation and use of IP for FPGA-based system designs. The
ReadyIP program allows users to evaluate and �try-before-they-buy�
IP within their designs through System Designer using Synplicity�s
industry-leading synthesis tools; (see related press release:
Synplicity Launches ReadyIP Program: The Industry�s First
Universal, Secure IP Flow For FPGA Implementation). �FPGAs have
evolved into system-implementation vehicles by virtue of the
increased density, speed, dedicated resources and the
time-to-market advantages that the latest generation of
programmable devices provides,� said Angela Sutton, senior product
marketing manager, Synplicity. �The System Designer capability
answers customers� needs for system-level implementation tools by
allowing them, for the first time, to access IP from a range of
vendors, evaluate the IP in the context of their design and then
easily implement the system in their choice of FPGA,� Sutton added.
The System Designer tool accepts as input IP, which complies with
the SPIRIT Consortium�s IP-XACT standard for describing IP, and
outputs top-level RTL and a Synplify project file ready for
synthesizing the complete design. Third-party IP is available to
System Designer users via Web browser access integrated into
Synplicity�s synthesis products. Through the Synplify Pro and
Synplify Premier FPGA design implementation tools, designers using
the System Designer capability can browse and download IP from
Synplicity partners participating in the ReadyIP program, currently
ARM, CAST, Gaisler Research, Synopsys and Tensilica, and thus
easily evaluate various options for their FPGA designs. System
Designer is built on the open source Eclipse, a de facto standard
providing for exceptional extensibility. Additionally, the System
Designer capability allows Synplify Pro and Synplify Premier users
to maintain and deploy internally developed system-level building
blocks and components which have been converted to the IP-XACT
format, and then re-use them across multiple designs and multiple
generations of FPGA designs. �Synplicity�s System Designer is a
step forward for systems designers targeting FPGAs,� said Graham
Budd, EVP and general manager, Processor Division, ARM. �Customers
will be able to download an evaluation version of the ARM�
Cortex�-M1 processor and quickly configure and connect peripheral
IP and then automatically generate design descriptions ready for
synthesis using Synplify Pro or Synplify Premier. We believe it
will be a great benefit to both FPGA system designers as well as
our IP users.� �We�ve been working closely with Synplicity over the
past year as the System Designer tool was in development,� stated
Steve Roddy, Tensilica�s vice president of marketing and business
development. �We believe that System Designer will boost designer
productivity, enabling FPGA designers to focus more time on system
analysis and less effort on system construction.� Pricing and
Availability System Designer is included, at no charge, for
Synplify Pro, Synplify Premier and Certify customers on active
maintenance as of April 2008. It is available immediately. About
Synplicity Synplicity�, Inc. (Nasdaq: SYNP) is a leading supplier
of innovative IC design and verification solutions that serve a
wide range of communications, military/aerospace, semiconductor,
consumer, computer, and other electronic applications markets.
Synplicity's FPGA implementation tools provide outstanding
performance, cost and time-to-market benefits by simplifying,
improving and automating logic synthesis, physical synthesis,
analysis and debug for programmable logic designs. Synplicity's ESL
synthesis solutions significantly improve productivity for DSP
designs realized in ASIC and FPGA devices. The Confirma� at-speed
verification platform, comprising software tools and the HAPS�
family of prototyping systems, enables both comprehensive
verification of ASIC, ASSP and SoC designs and software development
prior to chip tapeout. Synplicity is the number one supplier of
FPGA synthesis tools and its physical synthesis and ASIC
verification technologies are the recipients of several prestigious
industry awards. The company operates in more than 20 facilities
worldwide and is headquartered in Sunnyvale, California. For more
information visit http://www.synplicity.com. Forward-looking
Statements This press release contains forward-looking statements
including, but not limited to, statements regarding the
performance, achievements and benefits of the System Designer
feature. In some cases, you will be able to identify
forward-looking statements by terminology such as �may,� �will,�
�should,� �expects,� �can,� �believes� or the negative of these
terms or other comparable terminology. These statements are only
predictions and involve known and unknown risks, uncertainties and
other factors that may cause the actual results to differ
materially from the forward-looking statements and changing
technical requirements and customer demands in the FPGA and ASIC
markets. For additional information and considerations regarding
the risks faced by Synplicity, see its annual report on Form 10-K
for the year ended December 31, 2007, as filed with the Securities
and Exchange Commission, as well as other periodic reports filed
with the SEC from time to time. Although Synplicity believes that
the expectations reflected in the forward-looking statements are
reasonable, Synplicity cannot guarantee the future performance or
achievements of its software. In addition, neither Synplicity nor
any other person assumes responsibility for the accuracy or
completeness of these forward-looking statements. Synplicity
disclaims any obligation to update information contained in any
forward-looking statement. Synplicity, Synplify and Synplify Pro
are registered trademarks of Synplicity, Inc. System Designer, HAPS
and Confirma, are trademarks of Synplicity Inc. All other names
mentioned herein are the trademarks or registered trademarks of
their owners.
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