MENT Mentor Graphics Corp.

Mentor Graphics Corporation (Nasdaq:MENT) today announced it has validated Calibre๏ฟฝ LFD (litho-friendly design) results in silicon on 65nm process technology. A joint paper by Infineon Technologies and Chartered Semiconductor Manufacturing documents the positive results that can be achieved by implementing a lithographic process verification flow using Mentor Graphics๏ฟฝ Calibre LFD. Calibre LFD allows a design rule check (DRC) clean cell-based design to be analyzed for manufacturability by simulating the effects of real-world lithographic process variations. It is used early in design creation to identify lithography ๏ฟฝhot spots๏ฟฝ that can lead to a higher incidence of defects. Calibre LFD uses production process models that provide the level of accuracy required to make modifications with confidence. Chartered has been collaborating with Mentor to provide an LFD๏ฟฝ production kit since March 2006. The paper entitled ๏ฟฝHardware Verification of Litho-Friendly Design (LFD) Methodologies [6521-20]๏ฟฝ was presented in February 2007 at the SPIE Advanced Lithography Symposium and put together by a joint team from Infineon and Chartered (Reinhard M๏ฟฝrz, Kai Peter, Sonja Gr๏ฟฝndahl, and Klaus Keiner of Infineon Technologies AG; and Byoung Il Choi, Shyue Fong Quek, Mei Chun Yeo, Nan Shu Chen, and Soo Muay Goh of Chartered). The paper๏ฟฝs conclusions are based on a series of experiments designed to prove the value of implementing LFD model-based physical verification in addition to traditional rule-based design when moving to 65nm and smaller geometries. The experiments included lithography checks for Minimum Width (Pinching), Minimum Space (Bridging), Minimum Area Overlap, and Process Variability Index. Physical measurements on real test wafers processed with controlled dose and focus parameter variations were found to correlate closely with the LFD simulations. The experiments were run on an Infineon standard cell library manufactured in Chartered๏ฟฝs Fab 7. ๏ฟฝIt was important to prove the value of model-based lithography simulation capability by comparing simulated results to measurements of real test die produced on 65nm process,๏ฟฝ said Walter Ng, senior director of platform alliances at Chartered. ๏ฟฝThis work using Infineon๏ฟฝs standard cell library demonstrates that a highly accurate LFD flow for our 65nm process can provide substantial benefits for our customers.๏ฟฝ The SPIE paper concludes that DRC compliance alone is not sufficient to avoid hot spots that can affect yield at 65nm and below. The researchers also found that most hot spots could be attributed to a small number of cells. This suggests that significant yield improvements can be obtained by modifying a relatively small number of layout hot spots when these are ranked by severity and yield impact. ๏ฟฝWe are very gratified to see Infineon and Chartered leading the way to validate the LFD methodology,๏ฟฝ said Joe Sawicki, vice president and general manager, Design to Silicon Division, Mentor Graphics. ๏ฟฝWe believe the results of this work should be of high interest to other companies who are currently evaluating the benefits of different DFM solutions, and are working on implementing an LFD-based verification flow.๏ฟฝ About Mentor Graphics Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world๏ฟฝs most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,200 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/. Mentor Graphics and Calibre are registered trademarks and LFD is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.