Mentor Graphics Delivers Enhanced 0-In Clock Domain Crossing and Formal Verification Technology
08 5์ 2007 - 10:00PM
Business Wire
Mentor Graphics Corporation (Nasdaq:MENT) today announced the
immediate availability of version 2.5 of the 0-In๏ฟฝ Clock Domain
Crossing (CDC) and Formal Verification products. This new release
includes significant technology enhancements allowing customers to
apply advanced assertion-based verification techniques across a
wider range of design types more efficiently. Specifically, the
enhancements deliver increased performance and capacity to enable a
more rapid means of finding and correcting critical bugs prior to
committing designs to silicon. Moreover, through a much improved
graphical analysis and debug environment customers can be more
productive in resolving the toughest bugs in their chips. Mentor
continues to give significant attention to Clock Domain Crossing
(CDC) analysis and Formal Verification technology as it strives to
meet the challenges of functional verification. To enable a more
comprehensive functional verification solution, the CDC and Formal
Verification technologies delivered in 0-In Release 2.5 are tightly
integrated with the Questa๏ฟฝ advanced verification platform. CDC and
Formal Verification Technology Enhancements With this release, the
CDC verification functionality more efficiently supports a
hierarchical methodology that enhances the performance and capacity
of CDC analysis and allows the tool to scale with the size of the
design. Additionally, enhancements to the core CDC analysis
technology deliver improved support designs with multiple modes
allowing users to visualize CDC analysis results across all valid
combinations of modes in the design. The Formal Verification
functionality has been enhanced with a new edge-based clock model
that enables users to accurately model designs with multiple
asynchronous clocks. This new clock model expands the capacity of
formal exploration by 2 ๏ฟฝ 10 times depending on the design.
Additional proof engines enable users to prove a new class of
design properties by integrating multiple formal engines within one
tool. "We have a very strong commitment to deliver excellent
technology and exceptional support through our 0-In product
portfolio,๏ฟฝ said Robert Hum, vice president and general manager of
Mentor Graphics Design Verification and Test division. ๏ฟฝOur
customers face tremendous verification challenges and the 0-In
tools address some of the most critical verification areas.๏ฟฝ About
Mentor Graphics Mentor Graphics Corporation (Nasdaq:MENT) is a
world leader in electronic hardware and software design solutions,
providing products, consulting services and award-winning support
for the world๏ฟฝs most successful electronics and semiconductor
companies. Established in 1981, the company reported revenues over
the last 12 months of about $800 million and employs approximately
4,250 people worldwide. Corporate headquarters are located at 8005
S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web
site: http://www.mentor.com/. Mentor Graphics and 0-In are
registered trademarks and Questa is a trademark of Mentor Graphics.
All other company or product names are the registered trademarks or
trademarks of their respective owners.
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