Mentor Graphics Details Toshiba's Expanded Deployment of Catapult C for Complex ASIC Designs
01 9월 2010 - 10:00PM
Marketwired
Mentor Graphics Corp. (NASDAQ: MENT) today announced that Toshiba
Information Systems (JAPAN) Corporation has expanded their adoption
and deployment of the Catapult® C tool for the high-level synthesis
(HLS) of next generation application specific integrated circuits
(ASICs) for audio, communication and image processing systems.
Toshiba Information Systems (JAPAN) Corporation has chosen and
deployed the Catapult C Synthesis tool because they believe that
RTL-based design creation is not productive, and a shift to a
methodology based on untimed C++/SystemC is necessary. This shift,
which is facilitated by the Catapult C tool, addresses the need for
full-chip synthesis by providing a platform for a multi-language,
multi-abstraction approach to high-level synthesis. Toshiba also
recognizes that the Catapult C tool gives them the ability to
generate more solutions to identify the best hardware architecture
with much less time and effort.
"What makes our products stand out in the marketplace is the
quality and sophistication of the functionality within," said
Tomoji Takada, General Manager, LSI Solutions Division, Toshiba
Information Systems (JAPAN) Corporation. "With Catapult C, our
engineering teams spend less time working on the implementation
details and more time where it matters most, innovating and
differentiating our products by creating sophisticated algorithms
and tuning the hardware architecture for specific design and
technology goals."
"Our design teams have become quite familiar and comfortable
with using the Catapult C tool for design exploration and for
creating RTL code from the C-based functional descriptions," said
Akiyoshi Ohguro, Group Leader, LSI Design Center Dpt.1, LSI
Solutions Division, Toshiba Information Systems (JAPAN)
Corporation. "Our last project was fairly complex in nature, but
the Catapult C tool made the process of implementing and verifying
our functionality very manageable. Starting from high-level C++
code, we were able to explore various implementation options for
the 8X8 matrix of eigenvalue decomposition algorithm that is at the
heart of our FocusNavi® product. We were able to improve the
overall latency performance by a factor of five while keeping the
same frequency (100MHz) and area (50K ASIC gate count). This was
possible all because of high-level synthesis."
In traditional design methods, hardware is modeled in the form
of Verilog or VHDL register-transfer level (RTL) descriptions,
which hard-codes concurrency and most implementation details. These
representations are time consuming to create, verify and debug and
the process allows very little time to explore alternatives. In
contrast, a high-level synthesis flow starts from much more
abstract representations in C, C++ or SystemC. From there, through
user-driven constraints, high-level synthesis tools such as
Catapult C automatically add the necessary concurrency and
implementation details followed by generation of
correct-by-construction RTL code. This results in a much faster
path to fully verified hardware implementations.
"Toshiba Information Systems (JAPAN) Corporation continues to be
one of the most innovative systems houses in Japan," said Simon
Bloch, Vice President and General Manager, Design and Synthesis
division at Mentor. "We are fortunate to work with such an
influential company, and to learn time and time again that the
Catapult C tool delivers exceptional Quality of Results (QoR)
allowing customers like Toshiba to differentiate their products
with much less risk and far less time versus traditional hand-coded
RTL flows."
About Catapult C Synthesis The Catapult C
Synthesis tool automatically generates control and algorithmic RTL
multi-block designs from pure ANSI C++ and SystemC sources. This
process empowers designers to quickly achieve fully optimized and
error-free hardware implementation. By accelerating time to
verified RTL without sacrificing quality of results, the Catapult C
tool provides the productivity boost required to tackle the design
and verification challenges of modern ASIC design. The Catapult C
tool has been recognized as the HLS market leader by Gary Smith EDA
for three years in a row.
About Mentor Graphics Mentor Graphics
Corporation (NASDAQ: MENT) is a world leader in electronic hardware
and software design solutions, providing products, consulting
services and award-winning support for the world's most successful
electronics and semiconductor companies. Established in 1981, the
company reported revenues over the last 12 months of about $800
million. Corporate headquarters are located at 8005 S.W. Boeckman
Road, Wilsonville, Oregon 97070-7777. World Wide Web site:
http://www.mentor.com/.
(Mentor Graphics and Catapult are registered trademarks of
Mentor Graphics Corporation. All other company and/or product names
are the trademarks and/or registered trademarks of their respective
owners.)
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For more information, please contact: Carole Dunn Mentor
Graphics 503.685.4716 carole_dunn@mentor.com Ryerson Schwark Mentor
Graphics 503.685.1660 ry_schwark@mentor.com
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