Mentor Graphics Releases 0-In CDC Version 3.0 to Support Verification Needs of Larger, More Complex Designs
01 6월 2010 - 10:00PM
Marketwired
Mentor Graphics Corp. (NASDAQ: MENT) today announced the immediate
availability of the 0-In® CDC tool version 3.0, the industry's most
complete and effective solution for clock domain crossing
verification. The patented technology in the 0-In CDC tool enables
comprehensive analysis and verification of clock domains,
synchronization, protocols, and reconvergence, using a combination
of static formal verification and simulation in a highly-automated
flow. As a result, the 0-In CDC tool enables verification of the
most complex designs, with little user effort.
The 0-In CDC v3.0 tool supports SystemVerilog, Verilog, and VHDL
with a wide variety of design styles and synchronization methods.
In version 3.0, the 0-In CDC tool supports top-down, bottom-up, and
mixed approaches for hierarchical analysis, and gives the user more
control over the verification process. The 0-In CDC v3.0 tool
includes patented technology that enables verification of the
effects of metastability and reconvergence during simulation. In
addition, the 0-In CDC v3.0 tool exports data to Mentor's Unified
Coverage Database (UCDB). Together, these enhancements enable users
to verify larger and more complex designs and integrate the results
into a complete coverage-driven verification flow.
"Clock-domain crossing verification is an increasingly-difficult
challenge in today's designs, which have large numbers of typically
asynchronous clock domains. It is a complex verification problem
that requires a multi-faceted solution," said John Lenyo, general
manager, Design Verification Technology (DVT) division. "The 0-In
CDC tool provides such a solution by combining our best-in-class
formal technology with the industry-leading Questa® verification
platform to attack the problem from several directions. Version 3.0
builds on extensive customer experience over the past 5 years to
provide even greater flexibility and power."
Questa Functional Verification Platform
The Questa functional verification platform combines high
performance and high capacity with the most comprehensive
verification capabilities in the industry. Assertion-based
Verification (ABV), intelligent testbench automation, Multi-view
Verification Components (MVCs), and Coverage-driven Verification
(CDV) are supported natively by the Questa platform's
high-performance assertion engine; a modern, high-performance
constraint solver; and extensive functional coverage features,
including verification management leveraging the Unified Coverage
Database (UCDB). Verification of low power design functionality can
be proven in an RTL environment with power-aware functional
verification. This full set of advanced verification functionality
is enabled by a flexible Open Verification Methodology (OVM) that
delivers unrivaled language and feature support in any design and
verification flow.
About Mentor Graphics Mentor Graphics
Corporation (NASDAQ: MENT) is a world leader in electronic hardware
and software design solutions, providing products, consulting
services and award-winning support for the world's most successful
electronics and semiconductor companies. Established in 1981, the
company reported revenues over the last 12 months of about $800
million. Corporate headquarters are located at 8005 S.W. Boeckman
Road, Wilsonville, Oregon 97070-7777. World Wide Web site:
http://www.mentor.com/.
(Mentor Graphics, 0-In and Questa are registered trademarks of
Mentor Graphics Corporation. All other company or product names are
the registered trademarks or trademarks of their respective
owners).
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For more information, please contact: Carole Dunn Mentor
Graphics 503.685.4716 carole_dunn@mentor.com Suzanne Graham Mentor
Graphics 503.685.7789 suzanne_graham@mentor.com
Mentor Graphics Corp. (NASDAQ:MENT)
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